This invention relates to a sampling pulse generator circuit for the stereo demodulator circuit of FM stereo receivers, especially a stereo demodulator circuit of a sample and hold system.
The stereo demodulator circuit of the sample and hold system has a sample and hold circuit which samples composite signals by using a pair of sampling pulses which are phase-synchronized to the stereo subcarrier and have a 180.degree. phase difference to each other. The sampled signals are held to separate main signals and subsignals divided into left and right channel signals.
In the stereo demodulator circuit of the sample and hold system, a pulse width of about 1.5 .mu.sec of a 38 KHz sampling pulse will suffice for separating the left and right channel signals when considering the response speed of the circuit and the degree of separation to obtain sufficient performance. For this purpose, a 304 KHz (pulse width .perspectiveto.1.5 .mu.sec) pulse is used.
Conventionally, this sampling pulse has been obtained by using an integrating circuit comprised of resistors and capacitors with a time constant properly selected, and by performing logic operations on signals delayed through the integrating circuit and signals not delayed, i.e. by-passing the integrating circuit. However, the pulse width of the sampling pulse is affected by the time constant of the integrating circuit, and there is a shortcoming that the temperature characteristic of the integrating circuit is not constant and the pulse width of the sampling pulse is not a constant, either.